1. Technical Field
The present invention relates to a circuit board.
2. Description of the Related Art
As described in Patent Document 1, a general substrate of the related art, a thickness of a dielectric layer is secured to minimize an influence on capacitance, and the like, generated at the time of stacking layers of the substrate.
Meanwhile, the larger the spaced distance between electrodes formed on the substrate, the smaller the capacitance value. However, in the case of a thin substrate, the spaced distance between dielectrics may not be maximized.
Therefore, properties of the substrate itself are sensitively changed by parasitic capacitance generated at the time of stacking the layers of the substrate and parasitic capacitance generated in a through via.
In the case of forming a number of build-up layers, it is easy to control the capacitance; however, in the case of a thin typed substrate, it has a limitation in forming a build-up layer or a thickness of the dielectric layer, which is required for controlling the capacitance.    [Patent Document 1] KR 2010-028209 A 12 Mar. 2010